Application Specific Integrated Circuits (ASICs) use a large number of high-speed serial links to increase the quantity and quality of information being processed. Improving performance of the high-speed serial links typically requires managing link jitter. While link jitter may be generally low for high-speed serial links in isolation, the jitter, however, may increase if it is measured while the links are in proximity to an active circuit. Known techniques for managing jitter in an active circuit may involve estimating the generated noise coupling. One such technique may include a finite element method analysis, where the entire substrate must be discretized, resulting in very complex computation. Another technique includes boundary element method (BEM) analysis, where the discretizing may involve defining boundaries of the elements. These known techniques, however, may result in inaccurate quantification of coupling of supply noise. Consequently, known techniques for analyzing substrate coupling for high-speed serial links are unsatisfactory in certain situations.